1. Technical Field
The disclosure relates to image processing, and more particularly to an image deblocking filter and image processing device utilizing the same.
2. Description of Related Art
Current image coding standards typically arrange video frames as a composite of video blocks, where a block serves as a basic unit of inter-frame or intra-frame coding. For example, the MPEG-4 standard developed by the Moving Picture Experts Group (MPEG) divides a video frame into video blocks referred to as “macroblocks.” Different standards may support variously sized video blocks. The H.264 standard supports video blocks of 16 by 16, 16 by 8, 8 by 16, 8 by 8, 8 by 4, 4 by 8, and 4 by 4 pixels.
Block-based inter-frame and/or intra-frame compression to achieve high compression gain, may cause blocky artifacts in a video sequence, which shows perceptible discontinuous edges between adjacent blocks. Different video coding standards, such as H.264, VC-1, and MPEG2, may have different deblocking schemes to reduce the blockish effect. Even a specific standard, such as H.264, may have various deblocking formulae.
Dedicated deblocking circuits may be designed for different deblocking applications. Integrating such dedicated circuits into one device makes the device supportive to multiple video coding schemes but may complicate circuit design and render circuit miniaturization more difficult. This is also inflexible when the device is required to accommodate new deblocking schemes. Running different video coding schemes on a general-purpose processor is more flexible but inefficient.